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FEATURES Integral Isolated Power Supply 500 V rms CMV Isolation Rating (100% Tested) High Accuracy: 0.05% Max Nonlinearity Small SIP Style Footprint Lowest Priced Isolation Amplifiers APPLICATIONS Single/Multichannel Data Acquisition Systems Process Control Input Signal Isolation Motor Control Utility Power Monitoring General Input Protection Circuits Ground Loop Interruption
FB 3 IN- 6 IN+ 5 ICOM 4
General Purpose Input Isolation Amplifier AD102/AD104
FUNCTIONAL BLOCK DIAGRAM
AD102
5V FS FILTER 1 9 OUT H I OUT LO SIGNAL AMPLIFIER AND MODULATOR
DEMOD
POWER POWER RECTIFIER OSCILLATOR 25kHz 7 +15V DC 2 PWR/CLK COM
GENERAL DESCRIPTION
The AD102 and AD104 are general purpose, two-port, isolation amplifiers suitable for use where input signal isolation is desired. Each offers a functionally complete, compact isolation solution rated at 500 V rms common mode, based upon the proven and reliable transformer-coupled, galvanic isolation technique used in all AD200 series isolation amplifier products. Each model is offered in a minimum footprint package requiring no external components to operate. Though similar to the AD202 and AD204, the AD102 and AD104 models are intended as lower cost solutions where the performance of the AD202 or AD204 is not demanded. Both the AD102 and AD104 can be used in applications where input-to-input and/or input-to-system isolation is desired. The AD102 is best suited for single input uses as it requires only +15 V dc power to operate. It may also be appropriate for multichannel applications when input-to-input isolation is not required such as where a single input multiplexer selects a specific channel prior to isolation. For applications where input to input isolation is required, the AD104 may be a more desirable choice. It offers the lowest cost per channel especially when powered from a common clock source, the cost of which may be amortized over many channels. The clock necessary for AD104 operation is a 25 kHz, 15 V p-p square wave applied to the clock input pin. Most standard oscillator components like a CD4047 or TL555 may be used, or a designer may choose the AD246 clock driver developed for the AD204 product.
PRODUCT HIGHLIGHTS Complete, Single Device Solution for Input Isolation
The AD102 offers full isolation without external parts or need for an external dc/dc power source. The AD104 features the same functionality at a lower price for multichannel uses when supplied with a 25 kHz clock signal.
High Accuracy
A maximum nonlinearity of 0.05% is specified for both the AD102 and AD104 over the rated temperature range.
Wide Bandwidth
Each is specified with a full power (-3 dB) bandwidth. The AD104 at 4 kHz and the AD102 at 1.5 kHz.
High Performance Common-Mode Rejection
While providing continuous 500 V rms isolation, greater than 100 dB rejection is provided. Each part has only 5.5 pF (typical) of common-mode input capacitance.
Uncommitted Input Stage
Both models offer an uncommitted op amp input stage for user flexibility and input gain optimization up to 100 V/V.
Low Power Consumption
The AD104 consumes only 35 mW from the clock source, the AD102 only 75 mW from the +15 V dc supply.
REV. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood. MA 02062-9106, U.S.A. Tel: 617/329-4700 Fax: 617/326-8703
AD102/AD104-SPECIFICATIONS (@ T = +25 C and power supply of +15 V
A
5% unless otherwise noted)
Notes
Parameter ACCURACY Gain Range Unity Gain Error vs. Temperature vs. Time vs. Supply Voltage, AD1021 vs. Supply Voltage, AD1041 Nonlinearity2 INPUT VOLTAGE RATINGS Linear Differential Range CMV, Input to Output2 AC, 60 Hz, Sinusoidal Waveform DC Common-Mode Rejection (CMR) RS 100 , AD1021 RS 100 , AD1041 RS 1 k, AD1021 RS 1 k, AD1041 Leakage Current INPUT CHARACTERISTICS Input Offset Voltage, Initial vs. Temperature Input Bias Current, Initial vs. Temperature Input Difference Current, Initial vs. Temperature Input Voltage Noise 0.1 Hz to 100 Hz f > 200 Hz Differential Input Impedance Common-Mode Input Impedance FREQUENCY RESPONSE Bandwidth, Full Power (-3 dB) AD1021 AD1041 Settling Time RATED OUTPUT Output Voltage Range Between OUT HI and OUT LO Between OUT HI or LO to PWR/CLK COM Output Resistance AD1021 AD1041 Output Ripple 100 kHz Bandwidth 5 kHz Bandwidth POWER SUPPLY (AD102 ONLY)1 Supply Voltage Rated Performance Operational Performance Supply Current
Min 1
Typ
Max 100 5.0
Unit V/V % ppm/C ppm %/V %/V % V V rms V pk-pk dB dB dB dB A
0.5 45 50 0.01 0.001
100 ppm/C max Per 1,000 Hours
0.05
5.0 500 700 100 105 95 105 0.5
Between IN+ and IN- 100% Tested
2 A max, In to Out, 240 V rms @ 60 Hz +25C 0C to +70C +25C 0C to +70C +25C 0C to +70C
( 10 10/G) 100 20 10 2 4 50 1012 2G 5.5
( 15 15/G) mV V/C pA nA pA nA V pk-pk nV/Hz pF
1.5 4.0 1.0
kHz kHz ms
VIN 5 V, G = 1-50 V/V VIN 5 V, G = 1-50 V/V Time to 10 mV from 10 V Step Input
5.0
6.5 8 4 10 0.5
V V k k mV pk-pk mV rms
+14.25 +13.5
+15 +15 5
+15.75 +16.5
V dc V dc mA
-2-
REV. A
AD102/AD104
Parameter CLOCK OSCILLATOR (AD104 ONLY)1 Source Voltage Amplitude Square Wave Frequency Duty Cycle TEMPERATURE RANGE Rated Performance Operating Storage PACKAGE DIMENSIONS SIP Style Package (Y) 0 -40 -40 Min 14.25 Typ 15 25 50 +70 +85 +85 Max 15.75 Unit V pk-pk Notes 7.5 V Amplitude Within 15 V Range kHz 5 kHz % Hi vs. Low 2%
C C C Not Including Pin Length
2.08 x 0.260 x 0.625 in. (max)
NOTES 1 Specification(s) apply to one model only, either AD102 or AD104, as indicated. 2 Nonlinearity is specified as a % deviation from a best fit straight line. 3 All units 100% tested by "Partial Discharge" method @ 750 V rms for 5 sec, 150 pc maximum allowable discharge. Specifications subject to change without notice.
PIN DESIGNATIONS
DIFFERENCES BETWEEN THE AD102 AND AD104
Pin 1 2 3 4 5 6 7 8 9
Function OUT HI PWR/CLK COM FB ICOM IN+ IN- +15 V DC (AD102) CLOCK INPUT (AD104) OUT LO
ORDERING GUIDE
The primary difference between the AD102 and AD104 is that the AD102 contains an integral clock oscillator circuit and the AD104 does not. As a result, the AD102 operates when supplied +15 V dc power while the AD104 requires power in the form of 15 V, 25 kHz square wave source. Typically a clock source for an AD104 will drive multiple devices to reduce the per channel cost of the source and to provide perfect oscillator synchronization between devices. The AD104 also consumes slightly less power and has more than twice the bandwidth of the AD102. In situations where only one or a few isolators are used, the convenience of stand-alone operation offered by the AD102 may provide a greater user advantage than use of the AD104. For maximum product flexibility both the AD102 and AD104 can be accommodated by using a single universal layout for device interchangeability.
Model AD102JY AD104JY
Package SIP Style SIP Style
Max CMV 500 V rms 500 V rms
Nonlinearity 0.05% 0.05%
CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although these devices feature proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
REV. A
-3-
AD102/AD104
INSIDE THE AD102 AND AD104
The AD102 and AD104 use an amplitude modulation technique to exploit transmission of low frequency signal levels through an isolation barrier produced by a signal transformer including signals at a dc level (Figures 1 and 2). Additionally a separate transformer is incorporated to provide power to the isolated input port of the device. It is driven by a 25 kHz, 15 V amplitude square wave generated internally by the AD102, supplied externally for the AD104. The device outputs are not buffered so the user may interchange output leads for signal inversion. In multichannel applications the outputs can be multiplexed with a single buffer following the multiplexer to minimize offset errors while reducing power consumption and cost.
FB 3 IN- 6 IN+ 5 ICOM 4 POWER POWER RECTIFIER OSCILLATOR 25kHz 7 +15V DC 2 PWR/CLK COM AMPLIFIER AND MODULATOR
USING THE AD102 AND AD104 Powering the AD102
The AD102 requires only a single +15 V DC power supply connected as shown in Figure 3 to operate. A series 1.3 k resistor and 1.0 F capacitor are connected across the +15 V DC and COMMON pins to aid in filtering power line variations.
AD102
1.0F
1.3k 7 +15VDC
2
PWR/CLK COM
SIGNAL
AD102
5V FS FILTER 1 9 OUT H I OUT LO
Figure 3. AD102 Power Input
Powering the AD104
DEMOD
The AD104 requires its power in the form of a 15 V p-p, 25 kHz square wave from an external source as shown in Figure 4 (NOTE: pinout for AD246 clock driver shown).
AD246 CLOCK DRIVER AD104 AD104
8 8
AD104
8
15V p - p @ 25kHz
1 2 12
+15VDC
Figure 1. AD102 Functional Block Diagram
2 2 2
13
PWR/CLK COM
FB 3 IN- 6 AMPLIFIER AND MODULATOR
SIGNAL
AD104
5V FS FILTER 1 9 OUT H I
IN+ 5 ICOM 4
DEMOD
Figure 4. Typical Multiple AD104 Connection
OUT LO
AD104 Clock Source
POWER POWER RECTIFIER 8 CLK IN 25kHz 2 PWR/CLK COM
The AD246 clock driver designed to power the AD204 is a clock driver that can be used to supply the required clock for the AD104 from a +15 V DC supply (refer to the AD202/AD204 data sheet for AD246 specifications). For designs where the lowest cost per channel approach is desired, it is usually more cost efficient for designers to consider a discrete onboard clock source such as the circuit shown in Figure 5 (essentially an AD246).
+15V 14 180pF 1 3 2 49.9k 12 9 8 7 4 C RC 6 5 Q 10 2 6 1N914 7
Figure 2. AD104 Functional Block Diagram
CLK OUT 1F 35V
CD4047B
R
4
5
3
TELEDYNE TSC426
1N914 CLK/PWR COM
Figure 5. Typical Clock Driver Circuit
-4-
REV. A
AD102/AD104
Although this circuit generates a unipolar clock output of 0 V-15 V, any 15 V amplitude square wave at 25 kHz with a duty cycle of 50% is acceptable. This is possible since the AD104 clock input is ac coupled by means of a 0.1 F capacitor as shown in Figure 6. The source, therefore, only needs to be 7.5 V p-p in total amplitude and may be offset as desired. A recommended maximum amplitude limit of 15 V with respect to PWR/CLK COM should not be exceeded. For gains larger than unity, the addition of a gain and feedback resistor allows amplification of smaller signals up to a higher level. Whenever practical, any low level signal should be amplified to meet a full 5 V output swing. This helps reduce the effective output ripple contribution introduced to the original signal during modulation, isolation and subsequent filtering as seen at the output.
3
T R A N S F O R M E R 0.1F 8 +V -V 0.1F 0.1F 2 PWR/CLK COM CLK IN
FB
100pF 2k
RF 6 5 IN- IN+ ISOLATION BARRIER OUT HI
1 VOUT (5V) 9
VSIG (5V)
RG 4
AMPLIFIER AND MODULATOR ICOM
OUT LO
AD104
AD102 OR AD104
R VOUT = VSIG x ( 1 + F ) RG R F 20k
Figure 6. AD104 Clock Input
One clock circuit will usually drive multiple AD104s (typically 4, 8 or 16 units). If many AD104s are to be operated from a single source, external bypass capacitors should be used with a value of at least 1 F for every five isolators used. Place the capacitor as close as possible to the clock driver.
Input Configuration
Figure 8. Input Connection for Gain > 1
The AD102 and AD104 are very easy to use in a wide range of applications. The input stage connections (IN+, IN-, FB, ICOM) approximate a "vanilla" type op amp input and may for all intents and purposes be treated as such. Most any typical circuit connection that is valid for a standard op amp can be accommodated, so long as it is expected to perform within the specifications herein (i.e., limited gain and bandwidth parameters). Figure 7 shows the most common input configuration, which is unity gain operation. This configuration is appropriate where the input signal is within the range of 5 V or where larger signals have been previously attenuated, usually by means of a traditional resistor divider technique.
3 6 FB IN-
When taking a gain of more than 5 V/V, addition of a 100 pF capacitor is recommended; it is not needed at lower gains, but if used will not adversely affect operation. Additionally, whenever the isolation amplifier is not powered, a negative input voltage of approximately 2 V may cause an input current to flow. If the signal source can supply more than a few mA of current, a 2 k limiting resistor in series with IN+ is recommended. This is especially advised when using AD102s as they may not power up properly with a high input current present, (see Figures 7 and 8 for examples).
Synchronization
Since the AD104 operates from a common clock, synchronization is inherent. AD102s will normally not interact to produce beat frequencies even when mounted on 0.3 inch centers. Interaction may occur in very rare situations where a large number of long, unshielded input cables are bundled together. In such cases, shielded cable may be required or AD104s can be used. For related information and application examples refer to the AD202/AD204 and AD210 data sheets.
VSIG (5V)
ISOLATION BARRIER OUT HI 5 1 AMPLIFIER 2k AND (SEE TEXT) MODULATOR ICOM OUT LO 9 4 IN+
VOUT (5V)
AD102 OR AD104
15VDC CLOCK IN COMMON
7 8 2
15VDC (AD102) OR CLOCK (AD104)
Figure 7. Unity Gain Application
REV. A
-5-
AD102/AD104
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
0.250 (6.35) TYP 0.260 (6.60) MAX 2.08 (52.83) MAX
AD102/AD104
FRONT VIEW
0.625 (15.88) MAX
SIDE VIEW
0.15 (3.81) TYP 0.120 (3.048)
0.010 x 0.020 (0.254 x 0.508)
0.143 (3.63)
0.10 (2.54)
1.50 (38.10)
1 9 8 2 7 BOTTOM VIEW 3 6 5 4
0.05 (1.27) 0.20 (5.08) NOTE: PIN 7 IS ONLY PRESENT ON AD102 PIN 8 IS ONLY PRESENT ON AD104 0.10 (2.54)
-6-
REV. A
PRINTED IN U.S.A.
C1954-10-10/94


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